Irizarry Cruz, William A.

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    FPGA implementation of a video watermarking algorithm
    (2006) Irizarry Cruz, William A.; Toledo QuiƱones, Manuel; College of Engineering; Palomera Garcia, Rogelio; Santiago Santiago, Nayda G.; Department of Electrical and Computer Engineering; Resto Irizarry, Pedro J.
    This thesis explores the FPGA-implementation of video watermarking. The watermarking of the real-time video stream produced by a battery-operated surveillance camera was selected as a prototype application. This application was chosen because it can take advantage of the low-power characteristics of the FPGA, and provided the project’s context and requirements. A comprehensive study of the relevant literature revealed no previous research on the use of an FPGA to implement video watermarking. After a detailed analysis of the relevant literature, the algorithm developed by Hartung and Girod to watermark MPEG-2 compressed video was chosen, and adapted to the requirements of the present project. A low-power, distributed-arithmetic version of the discrete cosine transform -the primary computational unit required by the algorithm- was used. The FPGA implementation was compared with one performed on a digital signal processor. In terms of speed of processing, power consumption and device cost, the results suggest that the FPGA is a better option. However, the digital signal processor implementation appears to require a lower development cost. The following contributions have been accomplished in this project: (1) a methodical analysis of the issues related to watermarking for surveillance systems was performed; (2) design practices for the low-power implementation of this type of algorithm were identified; and (3) a novel architecture for video watermarking on an FPGA was developed. These results can be extended relatively straightforwardly to other watermarking methods that rely on the DCT.