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dc.contributor.advisorDucoudray, Gladys O.
dc.contributor.authorRivera-Rivera, Melissa
dc.date.accessioned2019-05-15T17:59:31Z
dc.date.available2019-05-15T17:59:31Z
dc.date.issued2009
dc.identifier.urihttps://hdl.handle.net/20.500.11801/2345
dc.description.abstractA dynamic current (iDD) sensor supply is presented. The sensor uses the pad inherent resistance (the available between the positive power supply, Vdd, and the mission circuit), which allows current measurements without placing a device between the power supply and the circuit under test (CUT). Characterization of the pad frame, potential integrated measuring solutions by a current to voltage conversion and a preview of its use as a flag for faulty circuits are presented. The proposed circuit is a Built-In Self Test (BIST) capable of using already available integrated structures for measuring current waveforms. Vdd ring characterization yields an equivalent resistance of 225.948 mΩ. Some of the challenges involved in the design of such a sensor are: high-gain, high-bandwidth, low-power, low-noise, linearity and high slew rate. Circuit design and simulations were implemented using Cadence 0.6um CMOS technology and AMI 0.6um fabrication process.en_US
dc.description.abstractUn sensor de corriente dinámico es presentado. Este utiliza la resistencia inherente (estructura entre el contacto de fuente de potencia positiva, Vdd, y el circuito de misión), para realizar medidas de corriente sin la necesidad de colocar un dispositivo entre Vdd y el circuito bajo prueba. Caracterización del marco de contactos, potentes soluciones integradas para medir a través de una conversión de corriente a voltaje y sus usos como una bandera para circuitos con fallas es presentado. El circuito propuesto es un Built-In Self Test (BIST) capaz de usar la estructura disponible para medir las formas de corriente. Caracterización del anillo de Vdd resultó en una resistencia equivalente de 225.948 mΩ. Retos envueltos en el diseño son: alta-ganancia, alto-ancho de banda, baja-potencia, bajo-ruido, linealidad, y alto-slew rate. El diseño del circuito y simulaciones fueron implementados usando Cadence tecnología CMOS 0.6 um y AMI 0.6 um para la fabricación.en_US
dc.description.sponsorshipGEM Scholarship for its economic supporten_US
dc.language.isoEnglishen_US
dc.titleBuilt-in self test idd supply current sensoren_US
dc.typeThesisen_US
dc.rights.licenseAll rights reserveden_US
dc.rights.holder(c) 2009 Melissa Rivera-Riveraen_US
dc.contributor.committeeSerrano, Guillermo
dc.contributor.committeeCuadros, Carlos
dc.contributor.representativeBollman, Dorothy
thesis.degree.levelM.S.en_US
thesis.degree.disciplineElectrical Engineeringen_US
dc.contributor.collegeCollege of Engineeringen_US
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.description.graduationYear2009en_US


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  • Theses & Dissertations
    Items included under this collection are theses, dissertations, and project reports submitted as a requirement for completing a graduate degree at UPR-Mayagüez.

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